User Manual
Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 639 of 909 2019 Ambiq Micro, Inc.
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13.21.2.49AUX6 Register
Counter/Timer Auxiliary
OFFSET: 0x000000DC
INSTANCE 0 ADDRESS: 0x400080DC
Control bit fields for both halves of timer 0.
Table 916: CMPRAUXB6 Register Bits
Bit Name Reset RW Description
31:16 CMPR3B6 0x0 RW
Counter/Timer B6 Compare Register 3. Holds the upper limit for timer half
B.
15:0 CMPR2B6 0x0 RW
Counter/Timer B6 Compare Register 2. Holds the lower limit for timer half B.
Table 917: AUX6 Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
TMRB6EN23
TMRB6POL23
TMRB6TINV
TMRB6NOSYNC
TMRB6TRIG
RSVD
TMRB6LMT
RSVD
TMRA6EN23
TMRA6POL23
TMRA6TINV
TMRA6NOSYNC
TMRA6TRIG
TMRA6LMT
Table 918: AUX6 Register Bits
Bit Name Reset RW Description
31 RSVD 0x0 RO
RESERVED
30 TMRB6EN23 0x0 RW
Counter/Timer B6 Upper compare enable.
DIS = 0x1 - Disable enhanced functions.
EN = 0x0 - Enable enhanced functions.
29 TMRB6POL23 0x0 RW
Upper output polarity
NORM = 0x0 - Upper output normal polarity
INV = 0x1 - Upper output inverted polarity.
28 TMRB6TINV 0x0 RW
Counter/Timer B6 Invert on trigger.
DIS = 0x0 - Disable invert on trigger
EN = 0x1 - Enable invert on trigger