User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 634 of 909 2019 Ambiq Micro, Inc.
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13.21.2.46CTRL6 Register
Counter/Timer Control
OFFSET: 0x000000CC
INSTANCE 0 ADDRESS: 0x400080CC
This register holds the control bit fields for both halves of timer 6.
Table 910: CMPRB6 Register Bits
Bit Name Reset RW Description
31:16 CMPR1B6 0x0 RW
Counter/Timer B6 Compare Register 1.
15:0 CMPR0B6 0x0 RW
Counter/Timer B6 Compare Register 0.
Table 911: CTRL6 Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
CTLINK6
RSVD
TMRB6POL TMRB6CLR
TMRB6IE1 TMRB6IE0
TMRB6FN
TMRB6CLK
TMRB6EN
RSVD
TMRA6POL TMRA6CLR
TMRA6IE1 TMRA6IE0
TMRA6FN
TMRA6CLK
TMRA6EN
Table 912: CTRL6 Register Bits
Bit Name Reset RW Description
31 CTLINK6 0x0 RW
Counter/Timer A6/B6 Link bit.
TWO_16BIT_TIMERS = 0x0 - Use A6/B6 timers as two independent 16-bit
timers (default).
32BIT_TIMER = 0x1 - Link A6/B6 timers into a single 32-bit timer.
30:29 RSVD 0x0 RO
RESERVED
28 TMRB6POL 0x0 RW
Counter/Timer B6 output polarity.
NORMAL = 0x0 - The polarity of the TMRPINB6 pin is the same as the timer
output.
INVERTED = 0x1 - The polarity of the TMRPINB6 pin is the inverse of the
timer output.
27 TMRB6CLR 0x0 RW
Counter/Timer B6 Clear bit.
RUN = 0x0 - Allow counter/timer B6 to run
CLEAR = 0x1 - Holds counter/timer B6 at 0x0000.