User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 621 of 909 2019 Ambiq Micro, Inc.
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13.21.2.35AUX4 Register
Counter/Timer Auxiliary
OFFSET: 0x0000009C
INSTANCE 0 ADDRESS: 0x4000809C
Control bit fields for both halves of timer 4.
Table 888: CMPRAUXB4 Register Bits
Bit Name Reset RW Description
31:16 CMPR3B4 0x0 RW
Counter/Timer B4 Compare Register 3. Holds the upper limit for timer half
B.
15:0 CMPR2B4 0x0 RW
Counter/Timer B4 Compare Register 2. Holds the lower limit for timer half B.
Table 889: AUX4 Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
TMRB4EN23
TMRB4POL23
TMRB4TINV
TMRB4NOSYNC
TMRB4TRIG
RSVD
TMRB4LMT
RSVD
TMRA4EN23
TMRA4POL23
TMRA4TINV
TMRA4NOSYNC
TMRA4TRIG
TMRA4LMT
Table 890: AUX4 Register Bits
Bit Name Reset RW Description
31 RSVD 0x0 RO
RESERVED
30 TMRB4EN23 0x0 RW
Counter/Timer B4 Upper compare enable.
DIS = 0x1 - Disable enhanced functions.
EN = 0x0 - Enable enhanced functions.
29 TMRB4POL23 0x0 RW
Upper output polarity
NORM = 0x0 - Upper output normal polarity
INV = 0x1 - Upper output inverted polarity.
28 TMRB4TINV 0x0 RW
Counter/Timer B4 Invert on trigger.
DIS = 0x0 - Disable invert on trigger
EN = 0x1 - Enable invert on trigger