User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 606 of 909 2019 Ambiq Micro, Inc.
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13.21.2.23CMPRA3 Register
Counter/Timer A3 Compare Registers
OFFSET: 0x00000064
INSTANCE 0 ADDRESS: 0x40008064
This register holds the compare limits for timer half A.
13.21.2.24CMPRB3 Register
Counter/Timer B3 Compare Registers
OFFSET: 0x00000068
INSTANCE 0 ADDRESS: 0x40008068
This register holds the compare limits for timer half B.
Table 863: TMR3 Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
CTTMRB3 CTTMRA3
Table 864: TMR3 Register Bits
Bit Name Reset RW Description
31:16 CTTMRB3 0x0 RO
Counter/Timer B3.
15:0 CTTMRA3 0x0 RO
Counter/Timer A3.
Table 865: CMPRA3 Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
CMPR1A3 CMPR0A3
Table 866: CMPRA3 Register Bits
Bit Name Reset RW Description
31:16 CMPR1A3 0x0 RW
Counter/Timer A3 Compare Register 1.
15:0 CMPR0A3 0x0 RW
Counter/Timer A3 Compare Register 0.