User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 598 of 909 2019 Ambiq Micro, Inc.
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13.21.2.16CMPRA2 Register
Counter/Timer A2 Compare Registers
OFFSET: 0x00000044
INSTANCE 0 ADDRESS: 0x40008044
This register holds the compare limits for timer 2 A half.
13.21.2.17CMPRB2 Register
Counter/Timer B2 Compare Registers
OFFSET: 0x00000048
INSTANCE 0 ADDRESS: 0x40008048
This register holds the compare limits for timer 2 B half.
Table 851: CMPRA2 Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
CMPR1A2 CMPR0A2
Table 852: CMPRA2 Register Bits
Bit Name Reset RW Description
31:16 CMPR1A2 0x0 RW
Counter/Timer A2 Compare Register 1.
15:0 CMPR0A2 0x0 RW
Counter/Timer A2 Compare Register 0.
Table 853: CMPRB2 Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
CMPR1B2 CMPR0B2
Table 854: CMPRB2 Register Bits
Bit Name Reset RW Description
31:16 CMPR1B2 0x0 RW
Counter/Timer B2 Compare Register 1.
15:0 CMPR0B2 0x0 RW
Counter/Timer B2 Compare Register 0.