User Manual
Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 589 of 909 2019 Ambiq Micro, Inc.
All rights reserved.
13.21.2.9CMPRA1 Register
Counter/Timer A1 Compare Registers
OFFSET: 0x00000024
INSTANCE 0 ADDRESS: 0x40008024
This contains the Compare limits for timer 1 A half.
13.21.2.10CMPRB1 Register
Counter/Timer B1 Compare Registers
OFFSET: 0x00000028
INSTANCE 0 ADDRESS: 0x40008028
This contains the Compare limits for timer 1 B half.
Table 835: TMR1 Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
CTTMRB1 CTTMRA1
Table 836: TMR1 Register Bits
Bit Name Reset RW Description
31:16 CTTMRB1 0x0 RO
Counter/Timer B1.
15:0 CTTMRA1 0x0 RO
Counter/Timer A1.
Table 837: CMPRA1 Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
CMPR1A1 CMPR0A1
Table 838: CMPRA1 Register Bits
Bit Name Reset RW Description
31:16 CMPR1A1 0x0 RW
Counter/Timer A1 Compare Register 1.
15:0 CMPR0A1 0x0 RW
Counter/Timer A1 Compare Register 0.