User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 577 of 909 2019 Ambiq Micro, Inc.
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Note that for the Pulse and Count modes, the CMPR2/3 registers can always be configured so that OUT2
matches OUT. This provides more flexibility in the pin assignments, as any OUT2 connection can be used
as the corresponding OUT function if a separate OUT2 function is not required. For a single 32-bit pattern
from a timer, OUT2 can be configured in the CMPR2/3 registers to produce the same pattern as OUT.
The OUT and OUT2 outputs of each CTIMER will be toggling whenever the CTIMER is enabled,
independent of any pin connections configured for it. This allows these signals to be used as clocks and
triggers for other CTIMERs even when they are not being used as pin outputs.
Example flow is illustrated below:
1) Pickthepadyouwanttouse,fromcolumnPad(FNCSEL).
2) Setthatpad’sFN CSELtothevalueinparentheses.
3) Determine whichoftheoutputsincolumns 2‐7youwanttousetodrivethispin.
4) SettheOUTCFG0/1/2/3_CFGxbitfieldtothevalueof2through7toselectthedesired
CTIMER
output.
5) ClearthebitinCTENCFGcorrespondingtotheCTxxvaluethatmatchesthepad,tomakeitan
output.
13.21CTIMER Registers
Counter/Timer
INSTANCE 0 BASE ADDRESS:0x40008000
The Counter/Timer block contains 8 sixteen bit counter or timer functions. Each pair of these counters can
be cascaded into 32 bit Counter/Timer functions.