User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 539 of 909 2019 Ambiq Micro, Inc.
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12.2.2.11CLOCKEN2STAT Register
Clock Enable Status
OFFSET: 0x0000002C
INSTANCE 0 ADDRESS: 0x4000402C
This is a continuation of the clock enable status.
Table 779: CLOCKENSTAT Register Bits
Bit Name Reset RW Description
31:0 CLOCKENSTAT 0x0 RO
Clock enable status
ADC_CLKEN = 0x1 - Clock enable for the ADC.
APBDMA_ACTIVITY_CLKEN = 0x2 - Clock enable for the APBDMA
ACTIVITY
APBDMA_AOH_CLKEN = 0x4 - Clock enable for the APBDMA AOH
DOMAIN
APBDMA_AOL_CLKEN = 0x8 - Clock enable for the APBDMA AOL
DOMAIN
APBDMA_APB_CLKEN = 0x10 - Clock enable for the APBDMA_APB
APBDMA_BLEL_CLKEN = 0x20 - Clock enable for the APBDMA_BLEL
APBDMA_HCPA_CLKEN = 0x40 - Clock enable for the APBDMA_HCPA
APBDMA_HCPB_CLKEN = 0x80 - Clock enable for the APBDMA_HCPB
APBDMA_HCPC_CLKEN = 0x100 - Clock enable for the APBDMA_HCPC
APBDMA_MSPI_CLKEN = 0x200 - Clock enable for the APBDMA_MSPI
APBDMA_PDM_CLKEN = 0x400 - Clock enable for the APBDMA_PDM
BLEIF_CLK_CLKEN = 0x800 - Clock enable for the BLEIF
BLEIF_CLK32K_CLKEN = 0x1000 - Clock enable for the BLEIF 32khZ
CLOCK
CTIMER_CLKEN = 0x2000 - Clock enable for the CTIMER BLOCK
CTIMER0A_CLKEN = 0x4000 - Clock enable for the CTIMER0A
CTIMER0B_CLKEN = 0x8000 - Clock enable for the CTIMER0B
CTIMER1A_CLKEN = 0x10000 - Clock enable for the CTIMER1A
CTIMER1B_CLKEN = 0x20000 - Clock enable for the CTIMER1B
CTIMER2A_CLKEN = 0x40000 - Clock enable for the CTIMER2A
CTIMER2B_CLKEN = 0x80000 - Clock enable for the CTIMER2B
CTIMER3A_CLKEN = 0x100000 - Clock enable for the CTIMER3A
CTIMER3B_CLKEN = 0x200000 - Clock enable for the CTIMER3B
CTIMER4A_CLKEN = 0x400000 - Clock enable for the CTIMER4A
CTIMER4B_CLKEN = 0x800000 - Clock enable for the CTIMER4B
CTIMER5A_CLKEN = 0x1000000 - Clock enable for the CTIMER5A
CTIMER5B_CLKEN = 0x2000000 - Clock enable for the CTIMER5B
CTIMER6A_CLKEN = 0x4000000 - Clock enable for the CTIMER6A
CTIMER6B_CLKEN = 0x8000000 - Clock enable for the CTIMER6B
CTIMER7A_CLKEN = 0x10000000 - Clock enable for the CTIMER7A
CTIMER7B_CLKEN = 0x20000000 - Clock enable for the CTIMER7B
DAP_CLKEN = 0x40000000 - Clock enable for the DAP
IOMSTRIFC0_CLKEN = 0x80000000 - Clock enable for the IOMSTRIFC0
Table 780: CLOCKEN2STAT Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
CLOCKEN2STAT