User Manual
Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 527 of 909 2019 Ambiq Micro, Inc.
All rights reserved.
automatically adjusted by the Auto-adjustment function which is a combination of analog and digital
operations.
The HFRC is enabled only when it is required by an internal module. When the ARM core goes into a sleep
mode, the HFRC will be disabled unless another module is using it. If the ARM core goes into deep sleep
mode, the HFRC will be powered down when it is not needed. When the HFRC is powered up, it will take
a few microseconds for it to begin oscillating, and a few more microseconds before the output is
completely stable. In order to prevent erroneous internal clocks from occurring, the internal clocks are
gated until the HFRC is stable. The Apollo3 Blue MCU supports high frequency TurboSPOT burst mode.
The HFRC supplies both the 96MHz as well as the 48MHz clocks to support the high frequency core/
memory domains and the stable 48MHz clock for the remaining logic/IO controllers.
12.1.5 HFRC Auto-adjustment
In some applications it is important that the HFRC frequency be more accurate than the ±2% variation
typically seen, particularly in cases where the temperature may vary widely. A good example of this is in
cases where the Apollo3 Blue MCU communicates with another device via the UART. The frequency
matching with the other device in the connection is an important factor in the reliability of the connection. In
order to support a highly accurate HFRC, a function called Auto-adjustment is provided.
It should be noted that Auto-adjustment is dependent on an accurate clock source such as the crystal. The
min/max variation of the HFRC frequency with and without adjustment is different. See Section 21.5 on
page 778.
During auto-adjustment, the number of HFRC cycles which occur in one 32.768 kHz XT Oscillator cycle is
compared to a target value. If the count is different from the target, an HFRC tuning value is modified to
change the HFRC frequency. The target count is held in the REG_CLKGEN_HFADJ_HFXTADJ field. If the
target HFRC frequency is 48 MHz, the optimal HFXTADJ value is 48,000/32.768 or 1464. A different value
will result in a different nominal HFRC frequency.
Auto-adjustment works by periodically enabling the HFRC and the XT, counting the HFRC cycles in a
single XT cycle, subtracting that value from HFXTADJ and adding the resulting difference to the actual
HFRC tuning value. The current tuning value may be read back in the HFTUNERB field of the
REG_CLKGEN_HFVAL Register. Auto-adjustment is enabled in the REG_CLKGEN_HFADJ Register by
loading the repeat frequency value into the HFADJCK field and then setting the HFADJEN bit.
Auto-adjustment cycles will occur continuously if both the XT and the HFRC are currently requested by
other modules. If either oscillator is disabled, Auto-adjustment cycles will then occur at intervals
determined by the REG_CLKGEN_HFADJ_HFADJCK field, as shown in the register description. Shorter
repeat intervals will result in more accurate HFRC frequencies, especially if the temperature is changing
rapidly, but will result in higher power consumption. When an Auto-adjustment cycle occurs, if the XT was
disabled it is enabled and then a delay occurs to allow the XT to stabilize. This delay is defined by the
REG_CLKGEN_HFADJ_HFWARMUP field as defined in the Register document. Once the HFRC is
stable, the HFRC is enabled and several Auto-adjustments occur, each of which results in a refinement of
the tuning value. Once those adjustments are complete, the HFRC and XT are powered down unless they
are in use by other functions.
The following steps are recommended to enable the HFADJ functionality.
1. Write "0x47" to the CLKKEY register to enable access to CLK_GEN registers
2. Set the HFADJCK field in HFADJ register to set the target HFRC adjustment period. It can range
from 4 seconds (0x0) to 1024 seconds (0x7).
3. Set the gain for the adjustment through HFADJGAIN field in HFADJ register.
4. Set the HFWARMUP field if XT is STOP (through the OCTRL register STOPXT field).
5. Enable HFADJEN field in HFADJ register to start the adjustment cycle.