User Manual
Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 526 of 909 2019 Ambiq Micro, Inc.
All rights reserved.
12.1.3.1 XT Oscillator Digital Calibration
The XT Oscillator includes a Distributed Digital Calibration function. When the 32 kHz XT oscillator is
selected, the clock at the 16 kHz level of the divider chain is modified on a selectable interval using the
calibration value CALXT in the REG_CLKGEN_CALXT Register. Clock pulses are either added or
subtracted to ensure accuracy of the XT. CALXT cycles of the 16 kHz clock are gated (negative calibration)
or replaced by 32 kHz pulses (positive calibration) within every 64 second calibration period. Each step in
CALXT modifies the clock frequency by 0.9535 ppm, with a maximum adjustment of +975/-976 ppm
(±0.1%).
The pulses which are added to or subtracted from the 16 kHz clock are spread evenly over each
64 second period using the Ambiq Micro patented Distributed Calibration algorithm. This insures that in XT
mode the maximum cycle-to-cycle jitter in any clock of a frequency 16 kHz or lower caused by calibration
will be no more than one 16 kHz period (~60 us). This maximum jitter applies to all clocks in the Apollo3
Blue MCU which use the XT.
Note that since the 16 kHz XT clock is calibrated, the 32 kHz XT is an uncalibrated clock. This may be a
useful selection in some cases.
12.1.3.2 XT Calibration Process
The XT Oscillator calibration value is determined by the following process:
1. Write "0x47" to the CLKKEY register to enable access to CLK_GEN registers
2. Set the CALXT register field to 0 to insure calibration is not occurring.
3. Select the XT oscillator by setting the REG_CLKGEN_OCTRL_OSEL bit to 0.
4. Select the XT or a division of it on a CLKOUT pad.
5. Measure the frequency Fmeas at the CLKOUT pad.
6. Compute the adjustment value required in ppm as ((Fnom – Fmeas)*1000000)/Fmeas = PAdj
7. Compute the adjustment value in steps as PAdj/(1000000/2
19
) = PAdj/(0.9535) = Adj
8. Compare Adj value with min/max range of -976 to 975
9. If target Adj is within min and max, set CALXT = Adj
10. Otherwise, the XT frequency is too low to be calibrated.
If the 32 kHz XT Oscillator generates clocks at less than 8 kHz for a period of more than 32 ms, the
Apollo3 Blue MCU detects an Oscillator Failure. The Oscillator Fail (OF) flag is set when an Oscillator
Failure occurs, and is also set when the Apollo3 Blue MCU initially powers up. If the Oscillator Fail interrupt
enable (OFIE) bit is set, the OF flag will generate an interrupt. The current status of the XT Oscillator can
be read in the REG_CLKGEN_STATUS_OSCF bit, which will be a 1 if the XT Oscillator is not running at
least 8 kHz. Note that OSCF will always be set if the LFRC Oscillator is currently selected by the
REG_CLKGEN_OCTRL_OSEL bit.
If the FOS bit in REG_CLK_GEN_OCTRL is set and the Apollo3 Blue MCU RTC is currently using the XT
Oscillator, it will automatically switch to the LFRC Oscillator on an Oscillator Failure. This guarantees that
the RTC clock will not stop in any case. If the XT Oscillator experiences a temporary failure and
subsequently restarts, the Apollo3 Blue MCU will switch back to the XT Oscillator. The
REG_CLKGEN_STATUS_OMODE bit indicates the currently selected oscillator, which may not match the
oscillator requested by the REG_CLKGEN_OCTRL_OSEL bit if the XT Oscillator is not running.
12.1.4 High Frequency RC Oscillator (HFRC)
The high frequency HFRC Oscillator, with a nominal frequency of 48 MHz, is used to supply all high
frequency clocks in the Apollo3 Blue MCU such as the processor clock for the ARM core, memories and
many peripheral modules. Digital calibration is not supported for the HFRC, but its frequency may be