User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 525 of 909 2019 Ambiq Micro, Inc.
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12.1.2.1 LFRC Oscillator Digital Calibration
The LFRC Oscillator includes a patented Distributed Digital Calibration function similar to that of the XT
Oscillator (Section 12.1.3.2). Because the LFRC Oscillator has a greater fundamental variability, the
required range of calibration is much larger. When the 1024 Hz RC oscillator is selected, the clock at the
512 Hz level of the divider chain is modified on a selectable interval using the calibration value CALRC in
the REG_CLKGEN_CALRC Register. Clock pulses are either added or subtracted to ensure accuracy of
the LFRC. CALRC cycles of the 512 Hz clock are gated (negative calibration) or replaced by 1024 Hz
pulses (positive calibration) within every 1024 second calibration period. Each step in CALRC modifies the
clock frequency by 1.907 ppm, with a maximum adjustment of +249,954/-249,955 ppm (±25%). This is
enabled in the CALRC register, which is 18 bits wide. The most significant bit is the "sign" bit. A '1' on bit
17 would mean a subtraction, and a '0' would mean an addition. Bits 16 to 0 would be the number of cycles
to be added to or subtracted from the 512Hz LFRC clock across a 1024 second period. The range of
clocks that can be added or subtracted range from -131072 to 131071.
The pulses which are added to or subtracted from the 512 Hz clock are spread evenly over each
1024 second period using the Ambiq Micro patented Distributed Calibration algorithm. This ensures that in
LFRC mode the maximum cycle-to-cycle jitter in any clock of a frequency 512 Hz or lower caused by
calibration will be no more than one 512 Hz period (~2 ms). This maximum jitter applies to all clocks in the
Apollo3 Blue MCU which use the LFRC.
Note that since the 512 Hz LFRC clock is calibrated, the original 1024 Hz LFRC is an uncalibrated clock.
This may be a useful selection in some cases.
12.1.2.2 LFRC Calibration Process
The LFRC oscillator calibration value is determined by the following process:
1. Write "0x47" to the CLKKEY register to enable access to CLK_GEN registers
2. Set the CALRC field to 0 to insure calibration is not occurring.
3. Select the LFRC oscillator by setting the REG_CLKGEN_OCTRL_OSEL bit to 1.
4. Select the LFRC or a division of it on a CLKOUT pad.
5. Measure the frequency Fmeas at the CLKOUT pad.
6. Compute the adjustment value required in ppm as ((Fnom – Fmeas)*1000000)/Fmeas = PAdj
7. Compute the adjustment value in steps as PAdj/(1000000/2^19) = PAdj/(1.90735) = Adj
8. Compare Adj value with min/max range of -131072 to 131071
9. If the adjustment value falls between these two values, set CALRC = Adj
10. Otherwise, the LFRC frequency is too low or too high to be calibrated
12.1.3 High Precision XT Oscillator (XT)
The high accuracy XT Oscillator is tuned to an external 32.768 kHz crystal, and has a nominal frequency of
32.768 kHz. It is used when frequency accuracy is critically important. Because a crystal oscillator uses a
significant amount of power, the XT is only enabled when an internal module is using it. Digital calibration
logic is included.The output of the XT oscillator may be digitally calibrated to ±1 ppm (part per million).
It should be noted that the XT oscillator is also optional if the requirements of the design can tolerate the
internal LFRC/HFRC oscillator specifications. It should also be noted that external capacitors are not
required to tune an internal divided clock of the crystal input to achieve a precise scaling of 32.768kHz.
This is handled within the Apollo3 Blue MCU.
NOTE: The XTAL is highly sensitive to external leakage on the XI pin. Therefore it is recommended
to minimize the components on XI and to use extremely low leakage load capacitors.