User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 520 of 909 2019 Ambiq Micro, Inc.
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Table 755: INT1CLR Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
GPIO49 GPIO48 GPIO47 GPIO46 GPIO45 GPIO44 GPIO43 GPIO42 GPIO41 GPIO40 GPIO39 GPIO38 GPIO37 GPIO36 GPIO35 GPIO34 GPIO33 GPIO32
Table 756: INT1CLR Register Bits
Bit Name Reset RW Description
31:18 RSVD 0x0 RO
RESERVED
17 GPIO49 0x0 RW
GPIO49 interrupt.
16 GPIO48 0x0 RW
GPIO48 interrupt.
15 GPIO47 0x0 RW
GPIO47 interrupt.
14 GPIO46 0x0 RW
GPIO46 interrupt.
13 GPIO45 0x0 RW
GPIO45 interrupt.
12 GPIO44 0x0 RW
GPIO44 interrupt.
11 GPIO43 0x0 RW
GPIO43 interrupt.
10 GPIO42 0x0 RW
GPIO42 interrupt.
9GPIO41 0x0RW
GPIO41 interrupt.
8GPIO40 0x0RW
GPIO40 interrupt.
7GPIO39 0x0RW
GPIO39 interrupt.
6GPIO38 0x0RW
GPIO38 interrupt.
5GPIO37 0x0RW
GPIO37 interrupt.
4GPIO36 0x0RW
GPIO36 interrupt.
3GPIO35 0x0RW
GPIO35 interrupt.
2GPIO34 0x0RW
GPIO34 interrupt.
1GPIO33 0x0RW
GPIO33 interrupt.