User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 517 of 909 2019 Ambiq Micro, Inc.
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11.7.2.64INT1EN Register
GPIO Interrupt Registers 49-32: Enable
OFFSET: 0x00000210
INSTANCE 0 ADDRESS: 0x40010210
Set bits in this register to allow this module to generate the corresponding interrupt.
3GPIO3 0x0RW
GPIO3 interrupt.
2GPIO2 0x0RW
GPIO2 interrupt.
1GPIO1 0x0RW
GPIO1 interrupt.
0GPIO0 0x0RW
GPIO0 interrupt.
Table 751: INT1EN Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
GPIO49 GPIO48 GPIO47 GPIO46 GPIO45 GPIO44 GPIO43 GPIO42 GPIO41 GPIO40 GPIO39 GPIO38 GPIO37 GPIO36 GPIO35 GPIO34 GPIO33 GPIO32
Table 752: INT1EN Register Bits
Bit Name Reset RW Description
31:18 RSVD 0x0 RO
RESERVED
17 GPIO49 0x0 RW
GPIO49 interrupt.
16 GPIO48 0x0 RW
GPIO48 interrupt.
15 GPIO47 0x0 RW
GPIO47 interrupt.
14 GPIO46 0x0 RW
GPIO46 interrupt.
13 GPIO45 0x0 RW
GPIO45 interrupt.
12 GPIO44 0x0 RW
GPIO44 interrupt.
11 GPIO43 0x0 RW
GPIO43 interrupt.
Table 750: INT0SET Register Bits
Bit Name Reset RW Description