User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 507 of 909 2019 Ambiq Micro, Inc.
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Table 741: CTENCFG Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
EN31 EN30 EN29 EN28 EN27 EN26 EN25 EN24 EN23 EN22 EN21 EN20 EN19 EN18 EN17 EN16 EN15 EN14 EN13 EN12
EN11
EN10
EN9 EN8 EN7 EN6 EN5 EN4 EN3 EN2 EN1 EN0
Table 742: CTENCFG Register Bits
Bit Name Reset RW Description
31 EN31 0x1 RW
CT31 Enable
DIS = 0x1 - Disable CT31 for output
EN = 0x0 - Enable CT31 for output
30 EN30 0x1 RW
CT30 Enable
DIS = 0x1 - Disable CT30 for output
EN = 0x0 - Enable CT30 for output
29 EN29 0x1 RW
CT29 Enable
DIS = 0x1 - Disable CT29 for output
EN = 0x0 - Enable CT29 for output
28 EN28 0x1 RW
CT28 Enable
DIS = 0x1 - Disable CT28 for output
EN = 0x0 - Enable CT28 for output
27 EN27 0x1 RW
CT27 Enable
DIS = 0x1 - Disable CT27 for output
EN = 0x0 - Enable CT27 for output
26 EN26 0x1 RW
CT26 Enable
DIS = 0x1 - Disable CT26 for output
EN = 0x0 - Enable CT26 for output
25 EN25 0x1 RW
CT25 Enable
DIS = 0x1 - Disable CT25 for output
EN = 0x0 - Enable CT25 for output
24 EN24 0x1 RW
CT24 Enable
DIS = 0x1 - Disable CT24 for output
EN = 0x0 - Enable CT24 for output
23 EN23 0x1 RW
CT23 Enable
DIS = 0x1 - Disable CT23 for output
EN = 0x0 - Enable CT23 for output
22 EN22 0x1 RW
CT22 Enable
DIS = 0x1 - Disable CT22 for output
EN = 0x0 - Enable CT22 for output