User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 476 of 909 2019 Ambiq Micro, Inc.
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7 GPIO49INTD 0x0 RW
GPIO49 interrupt direction.
nCELOW = 0x0 - FNCSEL = 0x1 - nCE polarity active low
nCEHIGH = 0x1 - FNCSEL = 0x1 - nCE polarity active high
INTDIS = 0x0 - FNCSEL != 0x1, INCFG = 1 - No interrupt on GPIO transi-
tion
INTBOTH = 0x1 - FNCSEL != 0x1, INCFG = 1 - Interrupt on either low to
high or high to low GPIO transition
INTLH = 0x0 - FNCSEL != 0x1, INCFG = 0 - Interrupt on low to high GPIO
transition
INTHL = 0x1 - FNCSEL != 0x1, INCFG = 0 - Interrupt on high to low GPIO
transition
6:5
GPIO49OUT-
CFG
0x0 RW
GPIO49 output configuration.
DIS = 0x0 - FNCSEL = 0x3 - Output disabled
PUSHPULL = 0x1 - FNCSEL = 0x3 - Output is push-pull
OD = 0x2 - FNCSEL = 0x3 - Output is open drain
TS = 0x3 - FNCSEL = 0x3 - Output is tri-state
M0nCE3 = 0x0 - FNCSEL = 0x1 - IOM0 nCE, Channel 3
M1nCE3 = 0x1 - FNCSEL = 0x1 - IOM1 nCE, Channel 3
M2nCE3 = 0x2 - FNCSEL = 0x1 - IOM2 nCE, Channel 3
M4nCE3 = 0x3 - FNCSEL = 0x1 - IOM4 nCE, Channel 3
4 GPIO49INCFG 0x0 RW
GPIO49 input enable.
READ = 0x0 - Read the GPIO pin data
RDZERO = 0x1 - INTD = 0 - Readback will always be zero
READEN = 0x1 - INTD = 1 - Read the GPIO pin data
3 GPIO48INTD 0x0 RW
GPIO48 interrupt direction.
nCELOW = 0x0 - FNCSEL = 0x1 - nCE polarity active low
nCEHIGH = 0x1 - FNCSEL = 0x1 - nCE polarity active high
INTDIS = 0x0 - FNCSEL != 0x1, INCFG = 1 - No interrupt on GPIO transi-
tion
INTBOTH = 0x1 - FNCSEL != 0x1, INCFG = 1 - Interrupt on either low to
high or high to low GPIO transition
INTLH = 0x0 - FNCSEL != 0x1, INCFG = 0 - Interrupt on low to high GPIO
transition
INTHL = 0x1 - FNCSEL != 0x1, INCFG = 0 - Interrupt on high to low GPIO
transition
2:1
GPIO48OUT-
CFG
0x0 RW
GPIO48 output configuration.
DIS = 0x0 - FNCSEL = 0x3 - Output disabled
PUSHPULL = 0x1 - FNCSEL = 0x3 - Output is push-pull
OD = 0x2 - FNCSEL = 0x3 - Output is open drain
TS = 0x3 - FNCSEL = 0x3 - Output is tri-state
M0nCE2 = 0x0 - FNCSEL = 0x1 - IOM0 nCE, Channel 2
M1nCE2 = 0x1 - FNCSEL = 0x1 - IOM1 nCE, Channel 2
M2nCE2 = 0x2 - FNCSEL = 0x1 - IOM2 nCE, Channel 2
M3nCE2 = 0x3 - FNCSEL = 0x1 - IOM3 nCE, Channel 2
0 GPIO48INCFG 0x0 RW
GPIO48 input enable.
READ = 0x0 - Read the GPIO pin data
RDZERO = 0x1 - INTD = 0 - Readback will always be zero
READEN = 0x1 - INTD = 1 - Read the GPIO pin data
Table 664: CFGG Register Bits
Bit Name Reset RW Description