User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 466 of 909 2019 Ambiq Micro, Inc.
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11.7.2.18CFGE Register
GPIO Configuration Register E (Pads 32-39)
OFFSET: 0x00000050
INSTANCE 0 ADDRESS: 0x40010050
GPIO configuration controls for GPIO[39:32]. Writes to this register must be unlocked by the PADKEY
register.
3 GPIO24INTD 0x0 RW
GPIO24 interrupt direction.
nCELOW = 0x0 - FNCSEL = 0x1 - nCE polarity active low
nCEHIGH = 0x1 - FNCSEL = 0x1 - nCE polarity active high
INTDIS = 0x0 - FNCSEL != 0x1, INCFG = 1 - No interrupt on GPIO transi-
tion
INTBOTH = 0x1 - FNCSEL != 0x1, INCFG = 1 - Interrupt on either low to
high or high to low GPIO transition
INTLH = 0x0 - FNCSEL != 0x1, INCFG = 0 - Interrupt on low to high GPIO
transition
INTHL = 0x1 - FNCSEL != 0x1, INCFG = 0 - Interrupt on high to low GPIO
transition
2:1
GPIO24OUT-
CFG
0x0 RW
GPIO24 output configuration.
DIS = 0x0 - FNCSEL = 0x3 - Output disabled
PUSHPULL = 0x1 - FNCSEL = 0x3 - Output is push-pull
OD = 0x2 - FNCSEL = 0x3 - Output is open drain
TS = 0x3 - FNCSEL = 0x3 - Output is tri-state
M0nCE1 = 0x0 - FNCSEL = 0x1 - IOM0 nCE, Channel 1
M1nCE1 = 0x1 - FNCSEL = 0x1 - IOM1 nCE, Channel 1
M2nCE1 = 0x2 - FNCSEL = 0x1 - IOM2 nCE, Channel 1
M5nCE1 = 0x3 - FNCSEL = 0x1 - IOM5 nCE, Channel 1
0 GPIO24INCFG 0x0 RW
GPIO24 input enable.
READ = 0x0 - Read the GPIO pin data
RDZERO = 0x1 - INTD = 0 - Readback will always be zero
READEN = 0x1 - INTD = 1 - Read the GPIO pin data
Table 659: CFGE Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
GPIO39INTD
GPIO39OUTCFG
GPIO39INCFG
GPIO38INTD
GPIO38OUTCFG
GPIO38INCFG
GPIO37INTD
GPIO37OUTCFG
GPIO37INCFG
GPIO36INTD
GPIO36OUTCFG
GPIO36INCFG
GPIO35INTD
GPIO35OUTCFG
GPIO35INCFG
GPIO34INTD
GPIO34OUTCFG
GPIO34INCFG
GPIO33INTD
GPIO33OUTCFG
GPIO33INCFG
GPIO32INTD
GPIO32OUTCFG
GPIO32INCFG
Table 658: CFGD Register Bits
Bit Name Reset RW Description