User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 462 of 909 2019 Ambiq Micro, Inc.
All rights reserved.
11.7.2.17CFGD Register
GPIO Configuration Register D (Pads 24-31)
OFFSET: 0x0000004C
INSTANCE 0 ADDRESS: 0x4001004C
GPIO configuration controls for GPIO[31:24]. Writes to this register must be unlocked by the PADKEY
register.
Table 657: CFGD Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
GPIO31INTD
GPIO31OUTCFG
GPIO31INCFG
GPIO30INTD
GPIO30OUTCFG
GPIO30INCFG
GPIO29INTD
GPIO29OUTCFG
GPIO29INCFG
GPIO28INTD
GPIO28OUTCFG
GPIO28INCFG
GPIO27INTD
GPIO27OUTCFG
GPIO27INCFG
GPIO26INTD
GPIO26OUTCFG
GPIO26INCFG
GPIO25INTD
GPIO25OUTCFG
GPIO25INCFG
GPIO24INTD
GPIO24OUTCFG
GPIO24INCFG
Table 658: CFGD Register Bits
Bit Name Reset RW Description
31 GPIO31INTD 0x0 RW
GPIO31 interrupt direction.
nCELOW = 0x0 - FNCSEL = 0x1 - nCE polarity active low
nCEHIGH = 0x1 - FNCSEL = 0x1 - nCE polarity active high
INTDIS = 0x0 - FNCSEL != 0x1, INCFG = 1 - No interrupt on GPIO transi-
tion
INTBOTH = 0x1 - FNCSEL != 0x1, INCFG = 1 - Interrupt on either low to
high or high to low GPIO transition
INTLH = 0x0 - FNCSEL != 0x1, INCFG = 0 - Interrupt on low to high GPIO
transition
INTHL = 0x1 - FNCSEL != 0x1, INCFG = 0 - Interrupt on high to low GPIO
transition
30:29
GPIO31OUT-
CFG
0x0 RW
GPIO31 output configuration.
DIS = 0x0 - FNCSEL = 0x3 - Output disabled
PUSHPULL = 0x1 - FNCSEL = 0x3 - Output is push-pull
OD = 0x2 - FNCSEL = 0x3 - Output is open drain
TS = 0x3 - FNCSEL = 0x3 - Output is tri-state
M0nCE0 = 0x0 - FNCSEL = 0x1 - IOM0 nCE, Channel 0
M1nCE0 = 0x1 - FNCSEL = 0x1 - IOM1 nCE, Channel 0
M2nCE0 = 0x2 - FNCSEL = 0x1 - IOM2 nCE, Channel 0
M4nCE0 = 0x3 - FNCSEL = 0x1 - IOM4 nCE, Channel 0
28 GPIO31INCFG 0x0 RW
GPIO31 input enable.
READ = 0x0 - Read the GPIO pin data
RDZERO = 0x1 - INTD = 0 - Readback will always be zero
READEN = 0x1 - INTD = 1 - Read the GPIO pin data