User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 457 of 909 2019 Ambiq Micro, Inc.
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11.7.2.16CFGC Register
GPIO Configuration Register C (Pads 16-23)
OFFSET: 0x00000048
INSTANCE 0 ADDRESS: 0x40010048
GPIO configuration controls for GPIO[23:16]. Writes to this register must be unlocked by the PADKEY
register.
2:1 GPIO8OUTCFG 0x0 RW
GPIO8 output configuration.
DIS = 0x0 - FNCSEL = 0x3 - Output disabled
PUSHPULL = 0x1 - FNCSEL = 0x3 - Output is push-pull
OD = 0x2 - FNCSEL = 0x3 - Output is open drain
TS = 0x3 - FNCSEL = 0x3 - Output is tri-state
M3nCE0 = 0x0 - FNCSEL = 0x1 - IOM3 nCE, Channel 0
M4nCE0 = 0x1 - FNCSEL = 0x1 - IOM4 nCE, Channel 0
M5nCE0 = 0x2 - FNCSEL = 0x1 - IOM5 nCE, Channel 0
M0nCE0 = 0x3 - FNCSEL = 0x1 - IOM0 nCE, Channel 0
0GPIO8INCFG 0x0 RW
GPIO8 input enable.
READ = 0x0 - Read the GPIO pin data
RDZERO = 0x1 - INTD = 0 - Readback will always be zero
READEN = 0x1 - INTD = 1 - Read the GPIO pin data
Table 655: CFGC Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
GPIO23INTD
GPIO23OUTCFG
GPIO23INCFG
GPIO22INTD
GPIO22OUTCFG
GPIO22INCFG
GPIO21INTD
GPIO21OUTCFG
GPIO21INCFG
GPIO20INTD
GPIO20OUTCFG
GPIO20INCFG
GPIO19INTD
GPIO19OUTCFG
GPIO19INCFG
GPIO18INTD
GPIO18OUTCFG
GPIO18INCFG
GPIO17INTD
GPIO17OUTCFG
GPIO17INCFG
GPIO16INTD
GPIO16OUTCFG
GPIO16INCFG
Table 654: CFGB Register Bits
Bit Name Reset RW Description