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Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 455 of 909 2019 Ambiq Micro, Inc.
All rights reserved.
18:17
GPIO12OUT-
CFG
0x0 RW
GPIO12 output configuration.
DIS = 0x0 - FNCSEL = 0x3 - Output disabled
PUSHPULL = 0x1 - FNCSEL = 0x3 - Output is push-pull
OD = 0x2 - FNCSEL = 0x3 - Output is open drain
TS = 0x3 - FNCSEL = 0x3 - Output is tri-state
M3nCE0 = 0x0 - FNCSEL = 0x1 - IOM3 nCE, Channel 0
M4nCE0 = 0x1 - FNCSEL = 0x1 - IOM4 nCE, Channel 0
M5nCE0 = 0x2 - FNCSEL = 0x1 - IOM5 nCE, Channel 0
MSPInCE1 = 0x3 - FNCSEL = 0x1 - MPSI nCE, Channel 1
16 GPIO12INCFG 0x0 RW
GPIO12 input enable.
READ = 0x0 - Read the GPIO pin data
RDZERO = 0x1 - INTD = 0 - Readback will always be zero
READEN = 0x1 - INTD = 1 - Read the GPIO pin data
15 GPIO11INTD 0x0 RW
GPIO11 interrupt direction.
nCELOW = 0x0 - FNCSEL = 0x1 - nCE polarity active low
nCEHIGH = 0x1 - FNCSEL = 0x1 - nCE polarity active high
INTDIS = 0x0 - FNCSEL != 0x1, INCFG = 1 - No interrupt on GPIO transi-
tion
INTBOTH = 0x1 - FNCSEL != 0x1, INCFG = 1 - Interrupt on either low to
high or high to low GPIO transition
INTLH = 0x0 - FNCSEL != 0x1, INCFG = 0 - Interrupt on low to high GPIO
transition
INTHL = 0x1 - FNCSEL != 0x1, INCFG = 0 - Interrupt on high to low GPIO
transition
14:13
GPIO11OUT-
CFG
0x0 RW
GPIO11 output configuration.
DIS = 0x0 - FNCSEL = 0x3 - Output disabled
PUSHPULL = 0x1 - FNCSEL = 0x3 - Output is push-pull
OD = 0x2 - FNCSEL = 0x3 - Output is open drain
TS = 0x3 - FNCSEL = 0x3 - Output is tri-state
M0nCE0 = 0x0 - FNCSEL = 0x1 - IOM0 nCE, Channel 0
M1nCE0 = 0x1 - FNCSEL = 0x1 - IOM1 nCE, Channel 0
M2nCE0 = 0x2 - FNCSEL = 0x1 - IOM2 nCE, Channel 0
M3nCE0 = 0x3 - FNCSEL = 0x1 - IOM3 nCE, Channel 0
12 GPIO11INCFG 0x0 RW
GPIO11 input enable.
READ = 0x0 - Read the GPIO pin data
RDZERO = 0x1 - INTD = 0 - Readback will always be zero
READEN = 0x1 - INTD = 1 - Read the GPIO pin data
11 GPIO10INTD 0x0 RW
GPIO10 interrupt direction.
nCELOW = 0x0 - FNCSEL = 0x2 - nCE polarity active low
nCEHIGH = 0x1 - FNCSEL = 0x2 - nCE polarity active high
INTDIS = 0x0 - FNCSEL != 0x2, INCFG = 1 - No interrupt on GPIO transi-
tion
INTBOTH = 0x1 - FNCSEL != 0x2, INCFG = 1 - Interrupt on either low to
high or high to low GPIO transition
INTLH = 0x0 - FNCSEL != 0x2, INCFG = 0 - Interrupt on low to high GPIO
transition
INTHL = 0x1 - FNCSEL != 0x2, INCFG = 0 - Interrupt on high to low GPIO
transition
Table 654: CFGB Register Bits
Bit Name Reset RW Description