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Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 451 of 909 2019 Ambiq Micro, Inc.
All rights reserved.
14:13 GPIO3OUTCFG 0x0 RW
GPIO3 output configuration.
DIS = 0x0 - FNCSEL = 0x3 - Output disabled
PUSHPULL = 0x1 - FNCSEL = 0x3 - Output is push-pull
OD = 0x2 - FNCSEL = 0x3 - Output is open drain
TS = 0x3 - FNCSEL = 0x3 - Output is tri-state
M3nCE0 = 0x0 - FNCSEL = 0x2 - IOM3 nCE, Channel 0
M4nCE0 = 0x1 - FNCSEL = 0x2 - IOM4 nCE, Channel 0
M5nCE0 = 0x2 - FNCSEL = 0x2 - IOM5 nCE, Channel 0
M2nCE0 = 0x3 - FNCSEL = 0x2 - IOM2 nCE, Channel 0
12 GPIO3INCFG 0x0 RW
GPIO3 input enable.
READ = 0x0 - Read the GPIO pin data
RDZERO = 0x1 - INTD = 0 - Readback will always be zero
READEN = 0x1 - INTD = 1 - Read the GPIO pin data
11 GPIO2INTD 0x0 RW
GPIO2 interrupt direction.
nCELOW = 0x0 - FNCSEL = 0x7 - nCE polarity active low
nCEHIGH = 0x1 - FNCSEL = 0x7 - nCE polarity active high
INTDIS = 0x0 - FNCSEL != 0x7, INCFG = 1 - No interrupt on GPIO transi-
tion
INTBOTH = 0x1 - FNCSEL != 0x7, INCFG = 1 - Interrupt on either low to
high or high to low GPIO transition
INTLH = 0x0 - FNCSEL != 0x7, INCFG = 0 - Interrupt on low to high GPIO
transition
INTHL = 0x1 - FNCSEL != 0x7, INCFG = 0 - Interrupt on high to low GPIO
transition
10:9 GPIO2OUTCFG 0x0 RW
GPIO2 output configuration.
DIS = 0x0 - FNCSEL = 0x3 - Output disabled
PUSHPULL = 0x1 - FNCSEL = 0x3 - Output is push-pull
OD = 0x2 - FNCSEL = 0x3 - Output is open drain
TS = 0x3 - FNCSEL = 0x3 - Output is tri-state
M3nCE3 = 0x0 - FNCSEL = 0x7 - IOM3 nCE, Channel 3
M4nCE3 = 0x1 - FNCSEL = 0x7 - IOM4 nCE, Channel 3
M5nCE3 = 0x2 - FNCSEL = 0x7 - IOM5 nCE, Channel 3
M2nCE1 = 0x3 - FNCSEL = 0x7 - IOM2 nCE, Channel 1
8GPIO2INCFG 0x0 RW
GPIO2 input enable.
READ = 0x0 - Read the GPIO pin data
RDZERO = 0x1 - INTD = 0 - Readback will always be zero
READEN = 0x1 - INTD = 1 - Read the GPIO pin data
7GPIO1INTD 0x0RW
GPIO1 interrupt direction.
nCELOW = 0x0 - FNCSEL = 0x7 - nCE polarity active low
nCEHIGH = 0x1 - FNCSEL = 0x7 - nCE polarity active high
INTDIS = 0x0 - FNCSEL != 0x7, INCFG = 1 - No interrupt on GPIO transi-
tion
INTBOTH = 0x1 - FNCSEL != 0x7, INCFG = 1 - Interrupt on either low to
high or high to low GPIO transition
INTLH = 0x0 - FNCSEL != 0x7, INCFG = 0 - Interrupt on low to high GPIO
transition
INTHL = 0x1 - FNCSEL != 0x7, INCFG = 0 - Interrupt on high to low GPIO
transition
Table 652: CFGA Register Bits
Bit Name Reset RW Description