User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 442 of 909 2019 Ambiq Micro, Inc.
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Table 645: PADREGK Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
PAD43RSEL
PAD43FNC-
SEL
PAD43STRNG
PAD43INPEN
PAD43PULL
PAD42RSEL
PAD42FNC-
SEL
PAD42STRNG
PAD42INPEN
PAD42PULL
PAD41PWRDN
RSVD
PAD41FNC-
SEL
PAD41STRNG
PAD41INPEN
PAD41PULL
PAD40RSEL
PAD40FNC-
SEL
PAD40STRNG
PAD40INPEN
PAD40PULL
Table 646: PADREGK Register Bits
Bit Name Reset RW Description
31:30 PAD43RSEL 0x0 RW
Pad 43 pullup resistor selection.
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms
PULL6K = 0x1 - Pullup is ~6 KOhms
PULL12K = 0x2 - Pullup is ~12 KOhms
PULL24K = 0x3 - Pullup is ~24 KOhms
29:27 PAD43FNCSEL 0x3 RW
Pad 43 function select
UART1RX = 0x0 - Configure as the UART1 RX input signal
NCE43 = 0x1 - IOM/MSPI nCE group 43
CT18 = 0x2 - CTIMER connection 18
GPIO43 = 0x3 - Configure as GPIO43
M3SDAWIR3 = 0x4 - Configure as the IOMSTR3 I2C SDA or SPI WIR3 sig-
nal
M3MISO = 0x5 - Configure as the IOMSTR3 SPI MISO signal
RSVD6 = 0x6 - Reserved
RSVD7 = 0x7 - Reserved
26 PAD43STRNG 0x0 RW
Pad 43 drive strength
LOW = 0x0 - Low drive strength
HIGH = 0x1 - High drive strength
25 PAD43INPEN 0x0 RW
Pad 43 input enable
DIS = 0x0 - Pad input disabled
EN = 0x1 - Pad input enabled
24 PAD43PULL 0x0 RW
Pad 43 pullup enable
DIS = 0x0 - Pullup disabled
EN = 0x1 - Pullup enabled
23:22 PAD42RSEL 0x0 RW
Pad 42 pullup resistor selection.
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms
PULL6K = 0x1 - Pullup is ~6 KOhms
PULL12K = 0x2 - Pullup is ~12 KOhms
PULL24K = 0x3 - Pullup is ~24 KOhms