User Manual
Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 440 of 909 2019 Ambiq Micro, Inc.
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26 PAD39STRNG 0x0 RW
Pad 39 drive strength
LOW = 0x0 - Low drive strength
HIGH = 0x1 - High drive strength
25 PAD39INPEN 0x0 RW
Pad 39 input enable
DIS = 0x0 - Pad input disabled
EN = 0x1 - Pad input enabled
24 PAD39PULL 0x0 RW
Pad 39 pullup enable
DIS = 0x0 - Pullup disabled
EN = 0x1 - Pullup enabled
23:22 RSVD 0x0 RO
RESERVED
21:19 PAD38FNCSEL 0x3 RW
Pad 38 function select
TRIG3 = 0x0 - Configure as the ADC Trigger 3 signal
NCE38 = 0x1 - IOM/MSPI nCE group 38
UA0CTS = 0x2 - Configure as the UART0 CTS signal
GPIO38 = 0x3 - Configure as GPIO38
RSVD4 = 0x4 - Reserved
M3MOSI = 0x5 - Configure as the IOMSTR3 SPI MOSI output signal
UART1RX = 0x6 - Configure as the UART1 RX input signal
RSVD7 = 0x7 - Reserved
18 PAD38STRNG 0x0 RW
Pad 38 drive strength
LOW = 0x0 - Low drive strength
HIGH = 0x1 - High drive strength
17 PAD38INPEN 0x0 RW
Pad 38 input enable
DIS = 0x0 - Pad input disabled
EN = 0x1 - Pad input enabled
16 PAD38PULL 0x0 RW
Pad 38 pullup enable
DIS = 0x0 - Pullup disabled
EN = 0x1 - Pullup enabled
15 PAD37PWRDN 0x0 RW
Pad 37 VSS power switch enable
DIS = 0x0 - Power switch disabled
EN = 0x1 - Power switch enabled (switch to GND)
14 RSVD 0x0 RO
RESERVED
13:11 PAD37FNCSEL 0x3 RW
Pad 37 function select
TRIG2 = 0x0 - Configure as the ADC Trigger 2 signal
NCE37 = 0x1 - IOM/MSPI nCE group 37
UA0RTS = 0x2 - Configure as the UART0 RTS output signal
GPIO37 = 0x3 - Configure as GPIO37
SCCIO = 0x4 - SCARD serial data input/output
UART1TX = 0x5 - Configure as the UART1 TX output signal
PDMCLK = 0x6 - Configure as the PDM CLK output signal
CT29 = 0x7 - CTIMER connection 29
Table 644: PADREGJ Register Bits
Bit Name Reset RW Description