User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 430 of 909 2019 Ambiq Micro, Inc.
All rights reserved.
29:27 PAD23FNCSEL 0x3 RW
Pad 23 function select
UART0RX = 0x0 - Configure as the UART0 RX signal
NCE23 = 0x1 - IOM/MSPI nCE group 23
CT14 = 0x2 - CTIMER connection 14
GPIO23 = 0x3 - Configure as GPIO23
I2SWCLK = 0x4 - I2S word clock input
CMPOUT = 0x5 - Configure as voltage comparitor output
MSPI3 = 0x6 - MSPI data connection 3
26 PAD23STRNG 0x0 RW
Pad 23 drive strength
LOW = 0x0 - Low drive strength
HIGH = 0x1 - High drive strength
25 PAD23INPEN 0x0 RW
Pad 23 input enable
DIS = 0x0 - Pad input disabled
EN = 0x1 - Pad input enabled
24 PAD23PULL 0x0 RW
Pad 23 pullup enable
DIS = 0x0 - Pullup disabled
EN = 0x1 - Pullup enabled
23:22 RSVD 0x0 RO
RESERVED
21:19 PAD22FNCSEL 0x3 RW
Pad 22 function select
UART0TX = 0x0 - Configure as the UART0 TX signal
NCE22 = 0x1 - IOM/MSPI nCE group 22
CT12 = 0x2 - CTIMER connection 12
GPIO22 = 0x3 - Configure as GPIO22
PDM_CLK = 0x4 - Configure as the PDM CLK output
MSPI0 = 0x6 - MSPI data connection 0
SWO = 0x7 - Configure as the serial trace data output signal
18 PAD22STRNG 0x0 RW
Pad 22 drive strength
LOW = 0x0 - Low drive strength
HIGH = 0x1 - High drive strength
17 PAD22INPEN 0x0 RW
Pad 22 input enable
DIS = 0x0 - Pad input disabled
EN = 0x1 - Pad input enabled
16 PAD22PULL 0x0 RW
Pad 22 pullup enable
DIS = 0x0 - Pullup disabled
EN = 0x1 - Pullup enabled
15:14 RSVD 0x0 RO
RESERVED
Table 636: PADREGF Register Bits
Bit Name Reset RW Description