User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 422 of 909 2019 Ambiq Micro, Inc.
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11.7.2.3 PADREGC Register
Pad Configuration Register C (Pads 8-11)
OFFSET: 0x00000008
INSTANCE 0 ADDRESS: 0x40010008
This register controls the pad configuration controls for PAD11 through PAD8. Writes to this register must
be unlocked by the PADKEY register.
Table 629: PADREGC Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
PAD11FNCSEL
PAD11STRNG
PAD11INPEN
PAD11PULL
RSVD
PAD10FNC-
SEL
PAD10STRNG
PAD10INPEN
PAD10PULL
PAD9RSEL
PAD9FNCSEL
PAD9STRNG
PAD9INPEN
PAD9PULL
PAD8RSEL
PAD8FNCSEL
PAD8STRNG
PAD8INPEN
PAD8PULL
Table 630: PADREGC Register Bits
Bit Name Reset RW Description
31:30 RSVD 0x0 RO
RESERVED
29:27 PAD11FNCSEL 0x3 RW
Pad 11 function select
ADCSE2 = 0x0 - Configure as the analog input for ADC single ended input 2
NCE11 = 0x1 - IOM/MSPI nCE group 11
CT31 = 0x2 - CTIMER connection 31
GPIO11 = 0x3 - Configure as GPIO11
SLINT = 0x4 - Configure as the IOSLAVE interrupt out signal
UA1CTS = 0x5 - Configure as the UART1 CTS input signal
UART0RX = 0x6 - Configure as the UART0 RX input signal
PDM_DATA = 0x7 - Configure as the PDM Data input signal
26 PAD11STRNG 0x0 RW
Pad 11 drive strength
LOW = 0x0 - Low drive strength
HIGH = 0x1 - High drive strength
25 PAD11INPEN 0x0 RW
Pad 11 input enable
DIS = 0x0 - Pad input disabled
EN = 0x1 - Pad input enabled
24 PAD11PULL 0x0 RW
Pad 11 pullup enable
DIS = 0x0 - Pullup disabled
EN = 0x1 - Pullup enabled
23:22 RSVD 0x0 RO
RESERVED