User Manual
Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 418 of 909 2019 Ambiq Micro, Inc.
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23:22 RSVD 0x0 RO
RESERVED
21:19 PAD2FNCSEL 0x3 RW
Pad 2 function select
UART1RX = 0x0 - Configure as the UART1 RX input
SLMISO = 0x1 - Configure as the IOSLAVE SPI MISO signal
UART0RX = 0x2 - Configure as the UART0 RX input
GPIO2 = 0x3 - Configure as GPIO2
RSVD4 = 0x4 - Reserved
MSPI6 = 0x5 - CMSPI data connection 6
RSVD6 = 0x6 - Reserved
NCE2 = 0x7 - IOM/MSPI nCE group 2
18 PAD2STRNG 0x0 RW
Pad 2 drive strength
LOW = 0x0 - Low drive strength
HIGH = 0x1 - High drive strength
17 PAD2INPEN 0x0 RW
Pad 2 input enable
DIS = 0x0 - Pad input disabled
EN = 0x1 - Pad input enabled
16 PAD2PULL 0x0 RW
Pad 2 pullup enable
DIS = 0x0 - Pullup disabled
EN = 0x1 - Pullup enabled
15:14 PAD1RSEL 0x0 RW
Pad 1 pullup resistor selection.
PULL1_5K = 0x0 - Pullup is ~1.5 KOhms
PULL6K = 0x1 - Pullup is ~6 KOhms
PULL12K = 0x2 - Pullup is ~12 KOhms
PULL24K = 0x3 - Pullup is ~24 KOhms
13:11 PAD1FNCSEL 0x3 RW
Pad 1 function select
SLSDAWIR3 = 0x0 - Configure as the IOSLAVE I2C SDA or SPI WIR3 sig-
nal
SLMOSI = 0x1 - Configure as the IOSLAVE SPI MOSI signal
UART0TX = 0x2 - Configure as the UART0 TX output signal
GPIO1 = 0x3 - Configure as GPIO1
RSVD4 = 0x4 - Reserved
MSPI5 = 0x5 - MSPI data connection 5
RSVD6 = 0x6 - Reserved
NCE1 = 0x7 - IOM/MSPI nCE group 1
10 PAD1STRNG 0x0 RW
Pad 1 drive strength
LOW = 0x0 - Low drive strength
HIGH = 0x1 - High drive strength
9 PAD1INPEN 0x0 RW
Pad 1 input enable
DIS = 0x0 - Pad input disabled
EN = 0x1 - Pad input enabled
8PAD1PULL 0x0RW
Pad 1 pullup enable
DIS = 0x0 - Pullup disabled
EN = 0x1 - Pullup enabled
Table 626: PADREGA Register Bits
Bit Name Reset RW Description