User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 375 of 909 2019 Ambiq Micro, Inc.
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10.4.2.12DMATRIGSTAT Register
DMA Trigger Status Register
OFFSET: 0x00000244
INSTANCE 0 ADDRESS: 0x50011244
DMA Trigger Status Register
Table 546: DMATRIGEN Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
DTHR90
DTHR
Table 547: DMATRIGEN Register Bits
Bit Name Reset RW Description
31:2 RSVD 0x0 RO
RESERVED.
1DTHR90 0x0RW
Trigger DMA at FIFO 90 percent full. This signal is also used internally for
AUTOHIP function
0DTHR 0x0RW
Trigger DMA upon when FIFO iss filled to level indicated by the FIFO
THRESHOLD,at granularity of 16 bytes only
Table 548: DMATRIGSTAT Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
DTHR90STAT
DTHRSTAT
Table 549: DMATRIGSTAT Register Bits
Bit Name Reset RW Description
31:2 RSVD 0x0 RO
RESERVED.
1 DTHR90STAT 0x0 RO
Triggered DMA from FIFO reaching 90 percent full