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Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 354 of 909 2019 Ambiq Micro, Inc.
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9.14.1.4 HOST_WCS Register
Host Interrupt Write-to-Set Register
OFFSET: 0x7B
Write a 1 to a bit in this register to set the status bit of a pending interrupt.
Table 512: HOST_WCR Register Bits
Bit Name Reset RW Description
7 FUNDFLWC 0x0 WO Writing a 1 to this bit will clear the pending interrupt status bit FUNDFLSTAT
6 RDERRWC 0x0 WO Writing a 1 to this bit will clear the pending interrupt status bit RDERRSTAT
5 SWINT5WC 0x0 WO Writing a 1 to this bit will clear the pending interrupt status bit SWINT5STAT
4 SWINT4WC 0x0 WO Writing a 1 to this bit will clear the pending interrupt status bit SWINT4STAT
3 SWINT3WC 0x0 WO Writing a 1 to this bit will clear the pending interrupt status bit SWINT3STAT
2 SWINT2WC 0x0 WO Writing a 1 to this bit will clear the pending interrupt status bit SWINT2STAT
1 SWINT1WC 0x0 WO Writing a 1 to this bit will clear the pending interrupt status bit SWINT1STAT
0 SWINT0WC 0x0 WO Writing a 1 to this bit will clear the pending interrupt status bit SWINT0STAT
Table 513: HOST_WCS Register
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
FUNDFLWS
RDERRWS
SWINT5WS
SWINT4WS
SWINT3WS
SWINT2WS
SWINT1WS
SWINT0WS
Table 514: HOST_WCS Register Bits
Bit Name Reset RW Description
7 FUNDFLWS 0x0 WO Writing a 1 to this bit will set the pending interrupt status bit FUNDFLSTAT
6 RDERRWS 0x0 WO Writing a 1 to this bit will set the pending interrupt status bit RDERRSTAT
5 SWINT5WS 0x0 WO Writing a 1 to this bit will set the pending interrupt status bit SWINT5STAT
4 SWINT4WS 0x0 WO Writing a 1 to this bit will set the pending interrupt status bit SWINT4STAT
3 SWINT3WS 0x0 WO Writing a 1 to this bit will set the pending interrupt status bit SWINT3STAT
2 SWINT2WS 0x0 WO Writing a 1 to this bit will set the pending interrupt status bit SWINT2STAT
1 SWINT1WS 0x0 WO Writing a 1 to this bit will set the pending interrupt status bit SWINT1STAT
0 SWINT0WS 0x0 WO Writing a 1 to this bit will set the pending interrupt status bit SWINT0STAT