User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 351 of 909 2019 Ambiq Micro, Inc.
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9.13.2.17REGACCINTCLR Register
Register Access Interrupts: Clear
OFFSET: 0x00000218
INSTANCE 0 ADDRESS: 0x50000218
Write a 1 to a bit in this register to clear the interrupt status associated with that bit.
9.13.2.18REGACCINTSET Register
Register Access Interrupts: Set
OFFSET: 0x0000021C
INSTANCE 0 ADDRESS: 0x5000021C
Write a 1 to a bit in this register to instantly generate an interrupt from this module. (Generally used for
testing purposes).
Table 502: REGACCINTSTAT Register Bits
Bit Name Reset RW Description
31:0 REGACC 0x0 RW
Register access interrupts.
Table 503: REGACCINTCLR Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
REGACC
Table 504: REGACCINTCLR Register Bits
Bit Name Reset RW Description
31:0 REGACC 0x0 RW
Register access interrupts.
Table 505: REGACCINTSET Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
REGACC