User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 350 of 909 2019 Ambiq Micro, Inc.
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9.13.2.15REGACCINTEN Register
Register Access Interrupts: Enable
OFFSET: 0x00000210
INSTANCE 0 ADDRESS: 0x50000210
Set bits in this register to allow this module to generate the corresponding interrupt.
9.13.2.16REGACCINTSTAT Register
Register Access Interrupts: Status
OFFSET: 0x00000214
INSTANCE 0 ADDRESS: 0x50000214
Read bits from this register to discover the cause of a recent interrupt.
3 FRDERR 0x0 RW
FIFO Read Error interrupt.
2 FUNDFL 0x0 RW
FIFO Underflow interrupt.
1FOVFL 0x0RW
FIFO Overflow interrupt.
0FSIZE 0x0RW
FIFO Size interrupt.
Table 499: REGACCINTEN Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
REGACC
Table 500: REGACCINTEN Register Bits
Bit Name Reset RW Description
31:0 REGACC 0x0 RW
Register access interrupts.
Table 501: REGACCINTSTAT Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
REGACC
Table 498: INTSET Register Bits
Bit Name Reset RW Description