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Apollo3 Blue Datasheet

DS-A3-0p9p1 Page 317 of 909 2019 Ambiq Micro, Inc.

8.15.2.30CQCURIDX Register

IOM Command Queue current index value . Compared to the CQENDIDX reg contents to generate

the IDXEQ Pause event for command queue

OFFSET: 0x000002AC

INSTANCE 0 ADDRESS: 0x500042AC

INSTANCE 1 ADDRESS: 0x500052AC

INSTANCE 2 ADDRESS: 0x500062AC

INSTANCE 3 ADDRESS: 0x500072AC

INSTANCE 4 ADDRESS: 0x500082AC

INSTANCE 5 ADDRESS: 0x500092AC

Current index value, targeted to be written by register write operations within the command queue. This is

compared to the CQENDIDX and will stop the CQ operation if bit 15 of the CQPAUSEEN is '1' and

15:0 CQPEN 0x0 RW

Enables the specified event to pause command processing when active

IDXEQ = 0x8000 - Pauses the command queue when the current index

matches the last index

BLEXOREN = 0x4000 - Pause command queue when input BLE bit XORed

with SWFLAG4 is '1'

IOMXOREN = 0x2000 - Pause command queue when input IOM bit XORed

with SWFLAG3 is '1'

GPIOXOREN = 0x1000 - Pause command queue when input GPIO irq_bit

XORed with SWFLAG2 is '1'

MSPI1XNOREN = 0x800 - Pause command queue when input MSPI1 bit

XNORed with SWFLAG1 is '1'

MSPI0XNOREN = 0x400 - Pause command queue when input MSPI0 bit

XNORed with SWFLAG0 is '1'

MSPI1XOREN = 0x200 - Pause command queue when input MSPI1 bit

XORed with SWFLAG1 is '1'

MSPI0XOREN = 0x100 - Pause command queue when input MSPI0 bit

XORed with SWFLAG0 is '1'

SWFLAGEN7 = 0x80 - Pause the command queue when software flag bit 7

is '1'.

SWFLAGEN6 = 0x40 - Pause the command queue when software flag bit 6

is '1'

SWFLAGEN5 = 0x20 - Pause the command queue when software flag bit 5

is '1'

SWFLAGEN4 = 0x10 - Pause the command queue when software flag bit 4

is '1'

SWFLAGEN3 = 0x8 - Pause the command queue when software flag bit 3

is '1'

SWFLAGEN2 = 0x4 - Pause the command queue when software flag bit 2

is '1'

SWFLAGEN1 = 0x2 - Pause the command queue when software flag bit 1

is '1'

SWFLAGEN0 = 0x1 - Pause the command queue when software flag bit 0

is '1'

Table 453: CQPAUSEEN Register Bits

Bit Name Reset RW Description