User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 292 of 909 2019 Ambiq Micro, Inc.
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INSTANCE 4 ADDRESS: 0x50008110
INSTANCE 5 ADDRESS: 0x50009110
Provides controls for the operation of the internal FIFOs. Contains fields used to control the operation of
the POP register, and also controls to reset the internal pointers of the FIFOs.
8.15.2.7 FIFOLOC Register
FIFO Pointers
OFFSET: 0x00000114
INSTANCE 0 ADDRESS: 0x50004114
INSTANCE 1 ADDRESS: 0x50005114
INSTANCE 2 ADDRESS: 0x50006114
INSTANCE 3 ADDRESS: 0x50007114
INSTANCE 4 ADDRESS: 0x50008114
INSTANCE 5 ADDRESS: 0x50009114
Provides a read only value of the current read and write pointers. This register is read only and can be
used alogn with the FIFO direct access method to determine the next data to be used for input and output
functions.
Table 406: FIFOCTRL Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
FIFORSTN
POPWR
Table 407: FIFOCTRL Register Bits
Bit Name Reset RW Description
31:2 RSVD 0x0 RO
RESERVED
1FIFORSTN 0x1RW
Active low manual reset of the fifo. Write to 0 to reset fifo, and then write to
1 to remove the reset.
0POPWR 0x0RW
Selects the mode in which 'pop' events are done for the fifo read operations.
A value of '1' will prevent a pop event on a read operation, and will require a
write to the FIFOPOP register to create a pop event.