User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 288 of 909 2019 Ambiq Micro, Inc.
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8.15.2 IOM Registers
8.15.2.1 FIFO Register
FIFO Access Port
OFFSET: 0x00000000
INSTANCE 0 ADDRESS: 0x50004000
INSTANCE 1 ADDRESS: 0x50005000
INSTANCE 2 ADDRESS: 0x50006000
INSTANCE 3 ADDRESS: 0x50007000
INSTANCE 4 ADDRESS: 0x50008000
INSTANCE 5 ADDRESS: 0x50009000
Provides direct random access to both input and output fifos. The state of the FIFO is not distured by
reading these locations (ie no POP will be done). FIFO0 is accessible from addresses 0x0 - 0x1C, and is
used for data outuput from the IOM to external devices. These FIFO locations can be read and written
directly.
8.15.2.2 FIFOPTR Register
FIFO size and remaining slots open values
OFFSET: 0x00000100
INSTANCE 0 ADDRESS: 0x50004100
INSTANCE 1 ADDRESS: 0x50005100
INSTANCE 2 ADDRESS: 0x50006100
INSTANCE 3 ADDRESS: 0x50007100
INSTANCE 4 ADDRESS: 0x50008100
INSTANCE 5 ADDRESS: 0x50009100
Provides the current valid byte count of data within the FIFO as seen from the internal state machines.
FIFO0 is dedicated to outgoing transactions and FIFO1 is dedicated to incoming transactions. All counts
are specified in units of bytes.
Table 396: FIFO Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
FIFO
Table 397: FIFO Register Bits
Bit Name Reset RW Description
31:0 FIFO 0x0 RW
FIFO direct access. Only locations 0 - 3F will return valid information.