User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 273 of 909 2019 Ambiq Micro, Inc.
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Figure 28. I
2
C Normal Write Operation
8.7.9 I
2
C Normal Read Operation
If a Normal Read operation is selected in the OPER field of the Command, the I
2
C/SPI Master first
executes an Offset Address Transmission to load the Address Pointer of the slave with the desired Offset
Address. A subsequent operation will again issue the address of the slave but with the RW bit as a 1
indicating a read operation. As shown in Figure 29, this transaction begins with a RESTART condition so
that the interface will be held in a multi-master environment. After the address operation, the slave
becomes the transmitter and sends the register value from the location pointed to by the Address Pointer,
and the Address Pointer is incremented. Subsequent transactions produce successive register values,
until the I
2
C/SPI Master receiver responds with a NAK and a STOP to complete the operation.
Figure 29. I
2
C Normal Read Operation
8.7.10 I
2
C Raw Write Operation
If a Raw Write is selected in the OPER field of the Command, the I
2
C/SPI Master does not execute the
Offset Address Transmission, but simply begins transferring bytes as shown in Figure 30. This provides
support for slave devices which do not implement the standard offset address architecture. The OFFSET
field of Command is not used in this case.
Figure 30. I
2
C Raw Write Operation
8.7.11 I
2
C Raw Read Operation
If a Raw Read is selected in the OPER field of Command, the I
2
C/SPI Master does not execute the Offset
Address Transmission, but simply begins transferring bytes with a read as shown in Figure 31. This is
Addr Offset
SDA
SCL
7 0
Byte N
AWAA 7 0
Byte N+1
A 7 0
Byte N+2
A
SDA
SCL
7 0
Byte N
A A 7 0
Byte N+1
NAddr AR
RESTART
Addr OffsetAW
Addr
SDA
SCL
7 0
Byte 1
AWA7 0
Byte 2
A 7 0
Byte N
A7 0
Byte 0
A