User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 264 of 909 2019 Ambiq Micro, Inc.
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8.2.4.2 DMA Data transfers
DMA transfers are enabled by configuring the DMA related registers, enabling the DMA channel, and then
issuing the command. The command will automatically fetch and store the data associated with the
command without MCU intervention. The DMA channel is enabled via the REG_IOM_DMACFG.DMAEN
field. P2M DMA operations transfer data from peripheral to memory and are used in IOM READ
operations. M2P DMA operations transfer data from memory to peripheral and are used in IOM write
operations. DMA transfer size is programmed into the REG_IOM_DMATOTCOUNT register and supports
up to 4095 bytes of data transfer. The DMA transfer size is independent from the transaction size, and
allows a single DMA setting to be used across multiple commands. The direction of DMA data transfer
must match the command. The REG_IOM_DMACFG.DMAEN field enables/disables the DMA transfer
capability and must be set last when configuring the DMA, generally prior to sending the command.
The DMA engine within the module will initiate a transfer of data when a trigger event occurs. There are 2
types of triggers available, threshold (THR) and command completion (CMDCMP). The THR trigger will
activate when the threshold programmed into the FIFOWTHR or FIFORTHR in the REG_IOM_FIFOTHR
register meets the data criteria. Because the MCU access to the interface is 32 bits wide, only the word
count of the selected THR is used, and the low order bits of the FIFOWTHR or FIFORTHR are ignored.
During the transfer, the TOTCOUNT register is decremented to reflect the number of bytes transferred.
For IOM write operations (data written from IOM out to an external device), the THR trigger will activate
when the write FIFO contains FIFOWTHR[5:2] free words. If the remaining DMA transfer size is less than
this, only the needed number of words are transferred.
For IOM read operations (data read from external device), the THR trigger will activate when the read FIFO
contains FIFORTHR[5:2] words of valid data. If the remaining DMA transfer size is less than the RTHR
words, then the CMDCMP trigger can be enabled to transfer the remaining data. If the CMDCMP trigger is
disabled, and the number of bytes in the read FIFO is greater to or equal to the current TOTCOUNT, a
DMA transfer of TOTCOUNT will be done to complete the DMA operation. This mode requires that the
THR trigger be enabled as well.
The CMDCMP trigger activates when the command is complete and will transfer the lesser of the
TOTCOUNT or the number of bytes in the read FIFO. Note, this trigger is not needed for write operations,
and the THR trigger should be used in this case.
If DMA transfer size is matched to the IOM transaction size, it is recommended to program both the
FIFORTHR and FIFOWTHR to 0x10 (16 bytes) and only enable the THR trigger.
8.2.5 Transaction Initiation
To start a transaction, the IOM module must be powered up and the target external pins enabled via the
GPIO module. For SPI transactions, this will generally require 4 pins to be enabled via the function select
field of the PADREG registers in the GPIO module. The CEN pin for SPI transaction requires setting of the
FNCSEL field of the appropriate pin, as well as the CFGREG of the corresponding pin. This also includes
the setting of the default value of the CEN. This is needed to allow the IOM module to power down and not
activate the CEN signal.
Once the IOM module is powered on, and the external pins configured, the IOM submodule must be
enabled via the REG_IOM_SUBMODCTRL register. This will activate either the SPI or I2C interface. Once
this is complete, the submodule specific registers should be configured to set the desired mode and
features. If DMA is desired, the DMA registers should also be set, with the REG_IOM_DMACTRL.DMAEN
field set last. The registers relating to DMA operations are as follows:
- REG_IOM_DMATRIGEN – Sets the trigger source for starting a DMA transfer
- REG_IOM_DMACFG – Sets the DMA direction and enable for DMA
- REG_IOM_DMATOTCOUNT – Sets the total count of bytes to be transferred via the DMA operation.
Recommended to match the REG_IOM_CMD.TSIZE field for simplicity.