User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 25 of 909 2019 Ambiq Micro, Inc.
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Table 504: REGACCINTCLR Register Bits ............................................................................ 351
Table 505: REGACCINTSET Register .................................................................................... 351
Table 506: REGACCINTSET Register Bits ............................................................................ 352
Table 507: HOST_IER Register ............................................................................................... 352
Table 508: HOST_IER Register Bits ........................................................................................ 352
Table 509: HOST_ISR Register ............................................................................................... 353
Table 510: HOST_ISR Register Bits ........................................................................................ 353
Table 511: HOST_WCR Register ............................................................................................ 353
Table 512: HOST_WCR Register Bits ..................................................................................... 354
Table 513: HOST_WCS Register ............................................................................................. 354
Table 514: HOST_WCS Register Bits ..................................................................................... 354
Table 515: FIFOCTRLO Register ............................................................................................ 355
Table 516: FIFOCTRLO Register Bits ..................................................................................... 355
Table 517: FIFOCTRUP Register ............................................................................................ 355
Table 518: FIFOCTRUP Register Bits ..................................................................................... 355
Table 519: FIFO Register ......................................................................................................... 356
Table 520: FIFO Register Bits .................................................................................................. 356
Table 521: PDM Clock Output Reference Table ...................................................................... 359
Table 522: PDM Operating Modes and Data Formats ............................................................. 360
Table 523: Digital Volume Control .......................................................................................... 361
Table 524: LPF Digital Filter Parameters ................................................................................. 362
Table 525: PDM Register Map ................................................................................................. 364
Table 526: PCFG Register ........................................................................................................ 365
Table 527: PCFG Register Bits ................................................................................................ 365
Table 528: VCFG Register ....................................................................................................... 368
Table 529: VCFG Register Bits ................................................................................................ 368
Table 530: VOICESTAT Register ............................................................................................ 370
Table 531: VOICESTAT Register Bits .................................................................................... 370
Table 532: FIFOREAD Register .............................................................................................. 370
Table 533: FIFOREAD Register Bits ....................................................................................... 370
Table 534: FIFOFLUSH Register ............................................................................................. 371
Table 535: FIFOFLUSH Register Bits ..................................................................................... 371
Table 536: FIFOTHR Register ................................................................................................. 371
Table 537: FIFOTHR Register Bits .......................................................................................... 371
Table 538: INTEN Register ...................................................................................................... 372
Table 539: INTEN Register Bits .............................................................................................. 372
Table 540: INTSTAT Register ................................................................................................. 372
Table 541: INTSTAT Register Bits .......................................................................................... 373
Table 542: INTCLR Register ................................................................................................... 373
Table 543: INTCLR Register Bits ............................................................................................ 373
Table 544: INTSET Register .................................................................................................... 374
Table 545: INTSET Register Bits ............................................................................................. 374
Table 546: DMATRIGEN Register .......................................................................................... 375
Table 547: DMATRIGEN Register Bits .................................................................................. 375
Table 548: DMATRIGSTAT Register ..................................................................................... 375
Table 549: DMATRIGSTAT Register Bits .............................................................................. 375