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Apollo3 Blue Datasheet

DS-A3-0p9p1 Page 24 of 909 2019 Ambiq Micro, Inc.

Table 459: STATUS Register Bits ........................................................................................... 319

Table 460: MSPICFG Register ................................................................................................. 320

Table 461: MSPICFG Register Bits ......................................................................................... 320

Table 462: MI2CCFG Register ................................................................................................. 322

Table 463: MI2CCFG Register Bits ......................................................................................... 322

Table 464: DEVCFG Register .................................................................................................. 323

Table 465: DEVCFG Register Bits .......................................................................................... 323

Table 466: IOMDBG Register .................................................................................................. 324

Table 467: IOMDBG Register Bits .......................................................................................... 324

Table 468: Mapping of Direct Area Access Interrupts and Corresponding REGACCINTSTAT

Bits ............................................................................................................................................. 328

Table 469: I/O Interface Interrupt Control ................................................................................ 331

Table 470: IOSLAVE Register Map ........................................................................................ 339

Table 471: FIFOPTR Register .................................................................................................. 340

Table 472: FIFOPTR Register Bits .......................................................................................... 340

Table 473: FIFOCFG Register ................................................................................................. 340

Table 474: FIFOCFG Register Bits .......................................................................................... 341

Table 475: FIFOTHR Register ................................................................................................. 341

Table 476: FIFOTHR Register Bits .......................................................................................... 341

Table 477: FUPD Register ........................................................................................................ 342

Table 478: FUPD Register Bits ................................................................................................ 342

Table 479: FIFOCTR Register ................................................................................................. 342

Table 480: FIFOCTR Register Bits .......................................................................................... 342

Table 481: FIFOINC Register .................................................................................................. 343

Table 482: FIFOINC Register Bits ........................................................................................... 343

Table 483: CFG Register .......................................................................................................... 343

Table 484: CFG Register Bits ................................................................................................... 344

Table 485: PRENC Register ..................................................................................................... 344

Table 486: PRENC Register Bits .............................................................................................. 345

Table 487: IOINTCTL Register ............................................................................................... 345

Table 488: IOINTCTL Register Bits ........................................................................................ 345

Table 489: GENADD Register ................................................................................................. 346

Table 490: GENADD Register Bits .......................................................................................... 346

Table 491: INTEN Register ...................................................................................................... 346

Table 492: INTEN Register Bits .............................................................................................. 346

Table 493: INTSTAT Register ................................................................................................. 347

Table 494: INTSTAT Register Bits .......................................................................................... 347

Table 495: INTCLR Register ................................................................................................... 348

Table 496: INTCLR Register Bits ............................................................................................ 348

Table 497: INTSET Register .................................................................................................... 349

Table 498: INTSET Register Bits ............................................................................................. 349

Table 499: REGACCINTEN Register ...................................................................................... 350

Table 500: REGACCINTEN Register Bits .............................................................................. 350

Table 501: REGACCINTSTAT Register ................................................................................. 350

Table 502: REGACCINTSTAT Register Bits .......................................................................... 351

Table 503: REGACCINTCLR Register ................................................................................... 351