User Manual
Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 235 of 909 2019 Ambiq Micro, Inc.
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7.10.2.8 RXENTRIES Register
RX FIFO Entries
OFFSET: 0x0000001C
INSTANCE 0 ADDRESS: 0x5001401C
Number of words in RX FIFO
7.10.2.9 THRESHOLD Register
TX/RX FIFO Threshhold Levels
OFFSET: 0x00000020
INSTANCE 0 ADDRESS: 0x50014020
Threshold levels that trigger RXFull and TXEmpty interrupts
Table 342: RXENTRIES Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD RXENTRIES
Table 343: RXENTRIES Register Bits
Bit Name Reset RW Description
31:5 RSVD 0x0 RO
RESERVED
4:0 RXENTRIES 0x0 RO
Number of 32-bit words/entries in RX FIFO
Table 344: THRESHOLD Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD RSVD RXTHRESH RSVD TXTHRESH
Table 345: THRESHOLD Register Bits
Bit Name Reset RW Description
31:16 RSVD 0x0 RO
RESERVED
15:13 RSVD 0x0 RO
RESERVED
12:8 RXTHRESH 0x0 RW
Number of entries in TX FIFO that cause RXE interrupt