User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 233 of 909 2019 Ambiq Micro, Inc.
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7.10.2.4 INSTR Register
MSPI Transfer Instruction
OFFSET: 0x0000000C
INSTANCE 0 ADDRESS: 0x5001400C
Optional Instruction field to send for PIO transfers
7.10.2.5 TXFIFO Register
TX Data FIFO
OFFSET: 0x00000010
INSTANCE 0 ADDRESS: 0x50014010
TX Data FIFO
Table 334: INSTR Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD INSTR
Table 335: INSTR Register Bits
Bit Name Reset RW Description
31:16 RSVD 0x0 RO
RESERVED
15:0 INSTR 0x0 RW
Optional Instruction field to send (1st byte) - qualified by ISEND/ISIZE
Table 336: TXFIFO Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
TXFIFO
Table 337: TXFIFO Register Bits
Bit Name Reset RW Description
31:0 TXFIFO 0x0 WO
Data to be transmitted. Data should normall be aligned to the LSB (pad the
upper bits with zeros) unless BIGENDIAN is set.