User Manual
Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 208 of 909 2019 Ambiq Micro, Inc.
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INSTANCE 0 ADDRESS: 0x5000C260
Current index value, targeted to be written by register write operations within the command queue. This is
compared to the CQENDIDX and will stop the CQ operation if bit 15 of the CQPAUSEEN is '1' and
6.3.2.30 CQENDIDX Register
IOM Command Queue current index value. Compared to the CQCURIDX reg contents to generate
the IDXEQ Pause event for command queue
OFFSET: 0x00000264
INSTANCE 0 ADDRESS: 0x5000C264
End index value, targeted to be written by software to indicate the last valid register pair contained within
the command queue. register write operations within the command queue.
Table 307: CQCURIDX Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD CQCURIDX
Table 308: CQCURIDX Register Bits
Bit Name Reset RW Description
31:8 RSVD 0x0 RO
RESERVED
7:0 CQCURIDX 0x0 RW
Holds 8 bits of data that will be compared with the CQENDIX register field. If
the values match, the IDXEQ pause event will be activated, which will cause
the pausing of command queue operation if the IDXEQ bit is enabled in
CQPAUSEEN.
Table 309: CQENDIDX Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD CQENDIDX
Table 310: CQENDIDX Register Bits
Bit Name Reset RW Description
31:8 RSVD 0x0 RO
RESERVED