User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 205 of 909 2019 Ambiq Micro, Inc.
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6.3.2.26 CQFLAGS Register
Command Queue Flag Register
OFFSET: 0x00000254
INSTANCE 0 ADDRESS: 0x5000C254
Provides the current status of the SWFLAGS (bits 7:0) and the hardware generated flags (15:8). A '1' will
pause the CQ operation if it the same bit is enabled in the CQPAUSEEN register
Table 299: CQSTAT Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
CQERR
CQPAUSED
CQTIP
Table 300: CQSTAT Register Bits
Bit Name Reset RW Description
31:3 RSVD 0x0 RO
RESERVED.
2CQERR 0x0RW
Command queue processing error. This active high bit signals that an error
was encountered during the CQ operation.
1 CQPAUSED 0x0 RO
Command queue operation is currently paused.
0CQTIP 0x0RO
Command queue Transfer In Progress indicator. 1 will indicate that a CQ
transfer is active and this will remain active even when paused waiting for
external event.
Table 301: CQFLAGS Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
CQIRQMASK CQFLAGS