User Manual
Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 152 of 909 2019 Ambiq Micro, Inc.
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3.8.2.40 FLASHRPROT1 Register
Flash Read Protection Bits
OFFSET: 0x000003B4
INSTANCE 0 ADDRESS: 0x400203B4
These bits read-protect flash in 16KB chunks.
3.8.2.41 DMASRAMWRITEPROTECT0 Register
SRAM write-protection bits.
OFFSET: 0x000003C0
INSTANCE 0 ADDRESS: 0x400203C0
These bits write-protect system SRAM from DMA operations in 8KB chunks.
Table 208: FLASHRPROT0 Register Bits
Bit Name Reset RW Description
31:0 FR0BITS 0x0 RW
Copy (read) protect flash 0x00000000 - 0x0007FFFF. Each bit provides
read protection for 16KB chunks of flash. Bits are cleared by writing a 1 to
the bit. When read, 0 indicates the region is protected. Bits are sticky (can
be set when PROTLOCK is 1, but only cleared by reset)
Table 209: FLASHRPROT1 Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
FR1BITS
Table 210: FLASHRPROT1 Register Bits
Bit Name Reset RW Description
31:0 FR1BITS 0x0 RW
Copy (read) protect flash 0x00080000 - 0x000FFFFF. Each bit provides
read protection for 16KB chunks of flash. Bits are cleared by writing a 1 to
the bit. When read, 0 indicates the region is protected. Bits are sticky (can
be set when PROTLOCK is 1, but only cleared by reset)
Table 211: DMASRAMWRITEPROTECT0 Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
DMA_WPROT0