User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 142 of 909 2019 Ambiq Micro, Inc.
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3.8.2.26 FAULTCAPTUREEN Register
Enable the fault capture registers
OFFSET: 0x000001D0
INSTANCE 0 ADDRESS: 0x400201D0
Enable the fault capture registers
1 DCODEFAULT 0x0 RW
DCODE Bus Decoder Fault Detected bit. When set, a fault has been
detected, and the DCODEFAULTADDR register will contain the bus address
which generated the fault.
NOFAULT = 0x0 - No DCODE fault has been detected.
FAULT = 0x1 - DCODE fault detected.
0 ICODEFAULT 0x0 RW
The ICODE Bus Decoder Fault Detected bit. When set, a fault has been
detected, and the ICODEFAULTADDR register will contain the bus address
which generated the fault.
NOFAULT = 0x0 - No ICODE fault has been detected.
FAULT = 0x1 - ICODE fault detected.
Table 181: FAULTCAPTUREEN Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
FAULTCAPTUREEN
Table 182: FAULTCAPTUREEN Register Bits
Bit Name Reset RW Description
31:1 RSVD 0x0 RO
RESERVED.
0
FAULTCAPTU-
REEN
0x0 RW
Fault Capture Enable field. When set, the Fault Capture monitors are
enabled and addresses which generate a hard fault are captured into the
FAULTADDR registers.
DIS = 0x0 - Disable fault capture.
EN = 0x1 - Enable fault capture.
Table 180: FAULTSTATUS Register Bits
Bit Name Reset RW Description