User Manual
Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 141 of 909 2019 Ambiq Micro, Inc.
All rights reserved.
3.8.2.25 FAULTSTATUS Register
Reflects the status of the bus decoders' fault detection. Any write to this register will clear all of the
status bits within the register.
OFFSET: 0x000001CC
INSTANCE 0 ADDRESS: 0x400201CC
Reflects the status of the bus decoders' fault detection. Any write to this register will clear all of the status
bits within the register.
Table 177: SYSFAULTADDR Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
SYSFAULTADDR
Table 178: SYSFAULTADDR Register Bits
Bit Name Reset RW Description
31:0
SYS-
FAULTADDR
0x0 RO
SYS bus address observed when a Bus Fault occurred. Once an address is
captured in this field, it is held until the corresponding Fault Observed bit is
cleared in the FAULTSTATUS register.
Table 179: FAULTSTATUS Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
SYSFAULT
DCODEFAULT
ICODEFAULT
Table 180: FAULTSTATUS Register Bits
Bit Name Reset RW Description
31:3 RSVD 0x0 RO
RESERVED.
2 SYSFAULT 0x0 RW
SYS Bus Decoder Fault Detected bit. When set, a fault has been detected,
and the SYSFAULTADDR register will contain the bus address which gener-
ated the fault.
NOFAULT = 0x0 - No bus fault has been detected.
FAULT = 0x1 - Bus fault detected.