User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 130 of 909 2019 Ambiq Micro, Inc.
All rights reserved.
3.8.2.9 BODCTRL Register
BOD control Register
OFFSET: 0x00000100
INSTANCE 0 ADDRESS: 0x40020100
BOD control Register
Table 146: DEBUGGER Register Bits
Bit Name Reset RW Description
31:1 RSVD 0x0 RO
RESERVED
0LOCKOUT 0x0RW
Lockout of debugger (SWD).
Table 147: BODCTRL Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
BODHVREFSEL
BODLVREFSEL
BODFPWD
BODCPWD BODHPWD
BODLPWD
Table 148: BODCTRL Register Bits
Bit Name Reset RW Description
31:6 RSVD 0x0 RO
RESERVED.
5 BODHVREFSEL 0x0 RW
BODH External Reference Select. Note: the SWE mux select in PWRSE-
Q2SWE must be set for this to take effect.
4 BODLVREFSEL 0x0 RW
BODL External Reference Select. Note: the SWE mux select in PWRSE-
Q2SWE must be set for this to take effect.
3BODFPWD 0x0RW
BODF Power Down.
2BODCPWD 0x0RW
BODC Power Down.
1BODHPWD 0x0RW
BODH Power Down.
0 BODLPWD 0x0 RW
BODL Power Down.