User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 124 of 909 2019 Ambiq Micro, Inc.
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0x40020264 OTAPOINTER
OTA (Over the Air) Update Pointer/Status.
Reset only by POA
0x40020280 APBDMACTRL
DMA Control Register. Determines misc settings
for DMA operation
0x40020284 SRAMMODE SRAM Controller mode bits
0x40020348 KEXTCLKSEL
Key Register to enable the use of external clock
selects via the EXTCLKSEL reg
0x4002035C SIMOBUCK4 SIMO Buck Control Reg1
0x40020368 BLEBUCK2 BLEBUCK2 Control Reg
0x400203A0 FLASHWPROT0 Flash Write Protection Bits
0x400203A4 FLASHWPROT1 Flash Write Protection Bits
0x400203B0 FLASHRPROT0 Flash Read Protection Bits
0x400203B4 FLASHRPROT1 Flash Read Protection Bits
0x400203C0 DMASRAMWRITEPROTECT0 SRAM write-protection bits.
0x400203C4 DMASRAMWRITEPROTECT1 SRAM write-protection bits.
0x400203D0 DMASRAMREADPROTECT0 SRAM read-protection bits.
0x400203D4 DMASRAMREADPROTECT1 SRAM read-protection bits.
Table 130: MCUCTRL Register Map
Address(s) Register Name Description