Datasheet

VS1053b Datasheet

11 VS1053B REGISTERS

11.15 Analog-to-Digital Converter (ADC)

ADC modulator registers control Analog-to-Digital conversions of VS1053b.

ADC Decimator registers, preﬁx ADC_

Reg Type Reset Abbrev[bits] Description

0xC042 rw 0 CONTROL[4:0] ADC control

0xC043 r 0 DATA_LEFT ADC left channel data

0xC044 r 0 DATA_RIGHT ADC right channel data

ADC_CONTROL controls the ADC and its associated decimator unit.

ADC_CONTROL Bits

Name Bits Description

ADC_MODU2_PD 4 Right channel powerdown

ADC_MODU1_PD 3 Left channel powerdown

ADC_DECIM_FACTOR 2:1 ADC Decimator factor:

- 3 = downsample to XTALI/512 (nominal 24 kHz)

- 2 = downsample to XTALI/256 (nominal 48 kHz)

- 1 = downsample to XTALI/128 (nominal 96 kHz)

- 0 = downsample to XTALI/64 (nominal 192 kHz)

ADC_ENABLE 0 Set to activate ADC converter and decimator

Note: Setting bit SS_AD_CLOCK in register SCI_STATUS will halve the operation speed of the

A/D unit, and thus halve the resulting samplerate.

Each time a new (stereo) sample has been generated, an ADC interrupt is generated.

Version: 1.22, 2014-12-19 83