Datasheet

VS1053b Datasheet

11 VS1053B REGISTERS

11.4 VS1053b Hardware ADC Audio Paths

Registers

Multiplexer

ADC

decimator

ADC

amplifier

Microphone

MICP

LINE1

MICN

LINE2

ADC_DATA_LEFT

ADC_DATA_RIGHT

Figure 19: VS1053b ADC and DAC data paths with some data registers

Figure 18 presents the VS1053b Hardware ADC audio paths.

Analog audio may be fed upto two channels: one as a differential signal to MICN/MICP or as a

one-sided signal to Line1, and the other as a one-sided signal to Line2.

If microphone input for the left channel has been selected, audio is fed through a microphone

ampliﬁer and that signal is selected by a multiplexer.

Audio is then downsampled to one of four allowed samplerates: XTALI/64, XTALI/128, XTALI/256

or XTALI/512. With the nominal 12.288 MHz crystal, these correspond to 192, 96, 48 or 24 kHz

samplerates, respectively (Chapter 11.17).

If the “3 MHz” option bit SS_AD_CLOCK in register SCI_STATUS has been set to 1, then

samplerates are divided by two, so the nominal samplerates become 96, 48, 24 and 12 kHz.

Version: 1.22, 2014-12-19 71