Datasheet

VS1053b Datasheet
11 VS1053B REGISTERS
11.3 VS1053b Hardware DAC Audio Paths
Registers Registers
SRC_LEFT
SRC_RIGHT
SDM_LEFT
SDM_RIGHT
SDM
Sigma−delta
Left
Right
CBUF
I2S
SRC
Resampler Sidestream
Analog
drivermodulator
DAC
SRC
Register
Registers
DAC_FCTLL
DAC_FCTLH
SRC_CONTROL SDM_CONTROL
RegisterRegister
DAC_VOL
Registers
DAC_LEFT
DAC_RIGHT
Figure 18: VS1053b ADC and DAC data paths with some data registers
Figure 18 presents the VS1053b Hardware DAC audio paths.
The main audio path starts from the DAC register (Chapter 11.8) to the high-fidelity, fully digital
DAC SRC (Digital-to-Analog Converter SampleRate Converter), which low-pass filters and in-
terpolates the data to the high samplerate of XTALI/2 (nominally 6.144 MHz). This 18-bit data is
then fed to the volume control. It then passes through the sigma-delta modulator to the analog
driver and analog Left and Right signals.
The user may resample and record the data with the Resampler SampleRate Converter (Chap-
ter 11.16). Because there is no automatic low-pass filtering, it is the user’s responsibility to avoid
aliasing distortion.
The user may add a PCM sidestream with the Sidestream Sigma-Delta Modulator input (Chap-
ter 11.17). As is the case with the Resampler SampleRate Converter, hardware doesn’t offer
low-pass filtering, so sufficient aliasing image rejection is the responsibility of the user.
Version: 1.22, 2014-12-19 70