Datasheet

VS1053b Datasheet
7 SPI BUSES
7.3.3 SDI in VS1001 Compatibility Mode (deprecated, do not use in new designs)
DCLK
D7 D6 D5 D4 D3 D1D2 D0SDATA
BSYNC
Figure 7: SDI in VS1001 Mode - one byte transfer. Do not use in new designs!
When VS1053b is running in VS1001 compatibility mode, a BSYNC signal must be generated
to ensure correct bit-alignment of the input bitstream, as shown in Figures 7 and 8.
The first DCLK sampling edge (rising or falling, depending on selected polarity), during which
the BSYNC is high, marks the first bit of a byte (LSB, if LSB-first order is used, MSB, if MSB-first
order is used). If BSYNC is ’1’ when the last bit is received, the receiver stays active and next
8 bits are also received.
DCLK
D7 D6 D5 D4 D3 D1D2 D0 D7 D6 D5 D4 D3 D2 D1 D0SDATA
BSYNC
Figure 8: SDI in VS1001 Mode - two byte transfer. Do not use in new designs!
7.3.4 Passive SDI Mode (deprecated, do not use in new designs)
If SM_NEWMODE is 0 and SM_SDISHARE is 1, the operation is otherwise like the VS1001
compatibility mode, but bits are only received while the BSYNC signal is ’1’. Rising edge of
BSYNC is still used for synchronization.
Version: 1.22, 2014-12-19 19