Datasheet

vi
7766F–AVR–11/10
ATmega16/32U4
24.8ADC Conversion Result ......................................................................................305
24.9ADC Register Description ...................................................................................307
25 JTAG Interface and On-chip Debug System ..................................... 314
25.1Overview .............................................................................................................314
25.2Test Access Port – TAP ......................................................................................314
25.3TAP Controller .....................................................................................................316
25.4Using the Boundary-scan Chain ..........................................................................317
25.5Using the On-chip Debug System .......................................................................317
25.6On-chip Debug Specific JTAG Instructions .........................................................318
25.7On-chip Debug Related Register in I/O Memory .................................................319
25.8Using the JTAG Programming Capabilities .........................................................319
25.9Bibliography .........................................................................................................319
26 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 320
26.1Features ..............................................................................................................320
26.2System Overview ................................................................................................320
26.3Data Registers .....................................................................................................320
26.4Boundary-scan Specific JTAG Instructions .........................................................322
26.5Boundary-scan Related Register in I/O Memory .................................................323
26.6Boundary-scan Chain ..........................................................................................324
26.7ATmega16U4/ATmega32U4 Boundary-scan Order ............................................327
26.8Boundary-scan Description Language Files ........................................................329
27 Boot Loader Support – Read-While-Write Self-Programming ......... 330
27.1Boot Loader Features ..........................................................................................330
27.2Application and Boot Loader Flash Sections .......................................................330
27.3Read-While-Write and No Read-While-Write Flash Sections ..............................330
27.4Boot Loader Lock Bits .........................................................................................333
27.5Entering the Boot Loader Program ......................................................................334
27.6Addressing the Flash During Self-Programming .................................................337
27.7Self-Programming the Flash ................................................................................338
28 Memory Programming ......................................................................... 346
28.1Program And Data Memory Lock Bits .................................................................346
28.2Fuse Bits .............................................................................................................347
28.3Signature Bytes ...................................................................................................349
28.4Calibration Byte ...................................................................................................349
28.5Parallel Programming Parameters, Pin Mapping, and Commands .....................349